Track A: Circuits, SoC & Embedded Systems
13:00 - 14:00 (Lunch)
Session 1 (10:00 - 13:00)
RTL-to-GDSII : Synopsys Fusion Compiler In-Design Training for Digital Implementation
Speaker(s)Rupali Kale, Kripanshu Kumar, Azhar Imam
AffiliationSynopsys
Presentation FormatHands-on
13:00 - 14:00 (Lunch)
Session 2 (14:00 - 17:00)
RTL-to-GDSII in the Cloud: Running the Full Flow in a web-browser using Catalyzer
Speaker(s)Seema Johar, Vikash Patel
AffiliationCompcarta
Presentation FormatHands-on
Track B: AI Hardware & Design Automation
13:00 - 14:00 (Lunch)
Session 1 (10:00 - 13:00)
Methodology and Functional Safety Solution for Automotive Analog/Mixed-Signal Designs
Speaker(s)Lalit Mohan, Shiva Singh
AffiliationCadence
Presentation FormatLive Demo and Hands-on
ChipStack Super Agent: Reimagining Chip Design and Verification with AI
Speaker(s)Cadence Team
AffiliationCadence
Presentation FormatPresentation
13:00 - 14:00 (Lunch)
Session 2 (14:00 - 17:00)
Integrated Synopsys Semiconductor Design and Simulation Solutions: From Atomistic Materials to RTL Design
Speaker(s)Deepak Upadhyay, Atul Kumar Srivastava
AffiliationIMS India
Presentation FormatLive Demonstration
Track C: Emerging Devices & Advanced Integration
13:00 - 14:00 (Lunch)
Session 1 (10:00 - 13:00)
Quantum Device Modeling and Simulation Using QTCAD
Speaker(s)Mr. Ujjwal Pratap Singh
AffiliationImpulse Technology
Presentation FormatHands-on
Hands-on Tutorial on First-Principles Materials Modeling and Quantum Transport Simulation Using RESCU, DS-PAW, and NanoDCAL
Speaker(s)Mr. Ujjwal Pratap Singh
AffiliationImpulse Technology
Presentation FormatHands-on
13:00 - 14:00 (Lunch)
Session 2 (14:00 - 17:00)
SETFOs: Advance Simulation Platform for Solar Cells, OLEDs and Photodetector Simulation
Speaker(s)Mr. Sahil Verma
AffiliationImpulse Technology
Presentation FormatHands-on
Track D: Verification, Reliability & Hardware Security
13:00 - 14:00 (Lunch)
Session 1 (10:00 - 13:00)
VLSI Architecture and FPGA/ASIC/SoC Implementation of Modern Wireless Baseband Systems: From OFDM to OTFS
Speaker(s)Dr. Deepak Mishra, Dr. Kishor Sarawadekar, Dr. Sanjeev Sharma, Dr. Praful Pai, Dr. Anand Mukhopadhyay
AffiliationISRO, IIT BHU, Mathworks
Presentation FormatSeminar and Hands-on
13:00 - 14:00 (Lunch)
Session 2 (14:00 - 17:00)
Practical Backend VLSI Design and Sign-Off Methodologies across Technology Nodes
Speaker(s)Venkata Reddy Kolagatla, Arvind Bisht, Vivian Desalphine
AffiliationCDAC(Chip-In)
Presentation FormatConceptual or lecture-style